

Among other research, the Global Technology Applied Research (GTAR) Center at JPMorgan Chase is experimenting with quantum algorithms for constrained optimization to perform Natural Language Processing (NLP) for document summarization, addressing various application points across the firm.
Marco Pistoia, Ph.D., Managing Director, Distinguished Engineer, and Head of GT Applied Research recently led the research effort around a constrained version of the Quantum Approximate Optimization Algorithm (QAOA) that can extract and summarize the most important information from legal documents and contracts. This work was recently published in Nature Scientific Reports (Constrained Quantum Optimization for Extractive Summarization on a Trapped-ion Quantum Computer) and deemed the “largest demonstration to date of constrained optimization on a gate-based quantum computer.”
JPMorgan Chase was one of the early-access users of the Quantinuum H1-1 system when it was upgraded from 12 qubits with 3 parallel gating zones to 20 qubits with 5 parallel gating zones. The research team at JPMorgan Chase found the 20-qubit machine returned significantly better results than random guess without any error mitigation, despite the circuit depth exceeding 100 two-qubit gates. The circuits used were deeper than any quantum optimization circuits previously executed for any problem. “With 20 qubits, we could summarize bigger documents and the results were excellent,” Pistoia said. “We saw a difference, both in terms of the number of qubits and the quality of qubits.”
JPMorgan Chase has been working with Quantinuum’s quantum hardware since 2020 (pre-merger) and Pistoia has seen the evolution of the machine over time, as companies raced to add qubits. “It was clear early on that the number of qubits doesn't matter,” he said. “In the short term, we need computers whose qubits are reliable and give us the results that we expect based on the reference values.”
Jenni Strabley, Sr., Director of Offering Management for Quantinuum, stated, “Quality counts when it comes to quantum computers. We know our users, like JPMC, expect that every time they use our H-Series quantum computers, they get the same, repeatable, high-quality performance. Quality isn’t typically part of the day-to-day conversation around quantum computers, but it needs to be for users like Marco and his team to progress in their research.”
More broadly, the researchers claimed that “this demonstration is a testament to the overall progress of quantum computing hardware. Our successful execution of complex circuits for constrained optimization depended heavily on all-to-all connectivity, as the circuit depth would have significantly increased if the circuit had to be compiled to a nearest-neighbor architecture.”
The objective of the experiment was to produce a condensed text summary by selecting sentences verbatim from the original text. The specific goal was to maximize the centrality and minimize the redundancy of the sentences in the summary and do so with a limited number of sentences.
The JPMorgan Chase researchers used all 20 qubits of the H1-1 and executed circuits with two-qubit gate depths of up to 159 and two-qubit gate counts of up to 765. The team used IBM’s Qiskit for circuit manipulation and noiseless simulation. For the hardware experiments, they used Quantinuum’s TKET to optimize the circuits for H1-1’s native gate set. They also ran the quantum circuits in an emulator of the H1-1 device.
The JPMorgan Chase research team tested three algorithms: L-VQE, QAOA and XY-QAOA. L-VQE was easy to execute on the hardware but difficult to find good parameters for. Regarding the other two algorithms, it was easier to find good parameters, but the circuits were more expensive to execute. The XY-QAOA algorithm provided the best results.
Dr. Pistoia mentions that constrained optimization problems, such as extractive summarization, are ubiquitous in banks, thus finding high-quality solutions to constrained optimization problems can positively impact customers of all lines of business. It is also important to note that the optimization algorithm built for this experiment can also be used across other industries (e.g., transportation) because the underlying algorithm is the same in many cases.
Even with the quality of the results from this extractive summarization work, the NLP algorithm is not ready to roll out just yet. “Quantum computers are not yet that powerful, but we're getting closer,” Pistoia said. “These results demonstrate how algorithm and hardware progress is bringing the prospect of quantum advantage closer, which can be leveraged across many industries.”
Quantinuum, the world’s largest integrated quantum company, pioneers powerful quantum computers and advanced software solutions. Quantinuum’s technology drives breakthroughs in materials discovery, cybersecurity, and next-gen quantum AI. With over 500 employees, including 370+ scientists and engineers, Quantinuum leads the quantum computing revolution across continents.
Quantinuum is focusing on redefining what’s possible in hybrid quantum–classical computing by integrating Quantinuum’s best-in-class systems with high-performance NVIDIA accelerated computing to create powerful new architectures that can solve the world’s most pressing challenges.
The launch of Helios, Powered by Honeywell, the world’s most accurate quantum computer, marks a major milestone in quantum computing. Helios is now available to all customers through the cloud or on-premise deployment, launched with a go-to-market offering that seamlessly pairs Helios with the NVIDIA Grace Blackwell platform, targeting specific end markets such as drug discovery, finance, materials science, and advanced AI research.
We are also working with NVIDIA to adopt NVIDIA NVQLink, an open system architecture, as a standard for advancing hybrid quantum-classical supercomputing. Using this technology with Quantinuum Guppy and the NVIDIA CUDA-Q platform, Quantinuum has implemented NVIDIA accelerated computing across Helios and future systems to perform real-time decoding for quantum error correction.
In an industry-first demonstration, an NVIDIA GPU-based decoder integrated in the Helios control engine improved the logical fidelity of quantum operations by more than 3% — a notable gain given Helios’ already exceptionally low error rate. These results demonstrate how integration with NVIDIA accelerated computing through NVQLink can directly enhance the accuracy and scalability of quantum computation.

This unique collaboration spans the full Quantinuum technology stack. Quantinuum’s next-generation software development environment allows users to interleave quantum and GPU-accelerated classical computations in a single workflow. Developers can build hybrid applications using tools such as NVIDIA CUDA-Q, NVIDIA CUDA-QX, and Quantinuum’s Guppy, to make advanced quantum programming accessible to a broad community of innovators.
The collaboration also reaches into applied research through the NVIDIA Accelerated Quantum Computing Research Center (NVAQC), where an NVIDIA GB200 NVL72 supercomputer can be paired with Quantinuum’s Helios to further drive hybrid quantum-GPU research, including the development of breakthrough quantum-enhanced AI applications.
A recent achievement illustrates this potential: The ADAPT-GQE framework, a transformer-based Generative Quantum AI (GenQAI) approach, uses a Generative AI model to efficiently synthesize circuits to prepare the ground state of a chemical system on a quantum computer. Developed by Quantinuum, NVIDIA, and a pharmaceutical industry leader—and leveraging NVIDIA CUDA-Q with GPU-accelerated methods—ADAPT-GQE achieved a 234x speed-up in generating training data for complex molecules. The team used the framework to explore imipramine, a molecule crucial to pharmaceutical development. The transformer was trained on imipramine conformers to synthesize ground state circuits at orders of magnitude faster than ADAPT-VQE, and the circuit produced by the transformer was run on Helios to prepare the ground state using InQuanto, Quantinuum's computational chemistry platform.
From collaborating on hardware and software integrations to GenQAI applications, the collaboration between Quantinuum and NVIDIA is building the bridge between classical and quantum computing and creating a future where AI becomes more expansive through quantum computing, and quantum computing becomes more powerful through AI.
By Dr. Noah Berthusen
The earliest works on quantum error correction showed that by combining many noisy physical qubits into a complex entangled state called a "logical qubit," this state could survive for arbitrarily long times. QEC researchers devote much effort to hunt for codes that function well as "quantum memories," as they are called. Many promising code families have been found, but this is only half of the story.
Being able to keep a qubit around for a long time is one thing, but to realize the theoretical advantages of quantum computing we need to run quantum circuits. And to make sure noise doesn't ruin our computation, these circuits need to be run on the logical qubits of our code. This is often much more challenging than performing gates on the physical qubits of our device, as these "logical gates" often require many physical operations in their implementation. What's more, it often is not immediately obvious which logical gates a code has, and so converting a physical circuit into a logical circuit can be rather difficult.
Some codes, like the famous surface code, are good quantum memories and also have easy logical gates. The drawback is that the ratio of physical qubits to logical qubits (the "encoding rate") is low, and so many physical qubits are required to implement large logical algorithms. High-rate codes that are good quantum memories have also been found, but computing on them is much more difficult. The holy grail of QEC, so to speak, would be a high-rate code that is a good quantum memory and also has easy logical gates. Here, we make progress on that front by developing a new code with those properties.
A recent work from Quantinuum QEC researchers introduced genon codes. The underlying construction method for these codes, called the "symplectic double cover," also provided a way to obtain logical gates that are well suited for Quantinuum's QCCD architecture. Namely, these "SWAP-transversal" gates are performed by applying single qubit operations and relabeling the physical qubits of the device. Thanks to the all-to-all connectivity facilitated through qubit movement on the QCCD architecture, this relabeling can be done in software essentially for free. Combined with extremely high fidelity (~1.2 x10-5) single-qubit operations, the resulting logical gates are similarly high fidelity.
Given the promise of these codes, we take them a step further in our new paper. We combine the symplectic double codes with the [[4,2,2]] Iceberg code using a procedure called "code concatenation". A concatenated code is a bit like nesting dolls, with an outer code containing codes within it---with these too potentially containing codes. More technically, in a concatenated code the logical qubits of one code act as the physical qubits of another code.
The new codes, which we call "concatenated symplectic double codes", were designed in such a way that they have many of these easily-implementable SWAP-transversal gates. Central to its construction, we show how the concatenation method allows us to "upgrade" logical gates in terms of their ease of implementation; this procedure may provide insights for constructing other codes with convenient logical gates. Notably, the SWAP-transversal gate set on this code is so powerful that only two additional operations (logical T and S) are necessary for universal computation. Furthermore, these codes have many logical qubits, and we also present numerical evidence to suggest that they are good quantum memories.
Concatenated symplectic double codes have one of the easiest logical computation schemes, and we didn’t have to sacrifice rate to achieve it. Looking forward in our roadmap, we are targeting hundreds of logical qubits at ~ 1x 10-8 logical error rate by 2029. These codes put us in a prime position to leverage the best characteristics of our hardware and create a device that can achieve real commercial advantage.
Every year, the International Conference for High Performance Computing, Networking, Storage, and Analysis (SC) brings together the global supercomputing community to explore the technologies driving the future of computing.
Join Quantinuum at this year’s conference, taking place November 16th – 21st in St. Louis, Missouri, where we will showcase how our quantum hardware, software, and partnerships are helping define the next era of high-performance and quantum computing.
The Quantinuum team will be on-site at booth #4432 to showcase how we’re building the bridge between HPC and quantum.
On Tuesday and Wednesday, our quantum computing experts will host daily tutorials at our booth on Helios, our next-generation hardware platform, Nexus, our all-in-one quantum computing platform, and Hybrid Workflows, featuring the integration of NVIDIA CUDA-Q with Quantinuum Systems.
Join our team as they share insights on the opportunities and challenges of quantum integration within the HPC ecosystem:
Panel Session: The Quantum Era of HPC: Roadmaps, Challenges and Opportunities in Navigating the Integration Frontier
November 19th | 10:30 – 12:00pm CST
During this panel session, Kentaro Yamamoto from Quantinuum, will join experts from Lawrence Berkeley National Laboratory, IBM, QuEra, RIKEN, and Pawsey Supercomputing Research Centre to explore how quantum and classical systems are being brought together to accelerate scientific discovery and industrial innovation.
BoF Session: Bridging the Gap: Making Quantum-Classical Hybridization Work in HPC
November 19th | 5:15 – 6:45pm CST
Quantum-classical hybrid computing is moving from theory to reality, yet no clear roadmap exists for how best to integrate quantum processing units (QPUs) into established HPC environments. In this Birds of a Feather discussion, co-led by Quantinuum’s Grahame Vittorini and representatives from BCS, DOE, EPCC, Inria, ORNL NVIDIA, and RIKEN we hope to bring together a global community of HPC practitioners, system architects, quantum computing specialists and workflow researchers, including participants in the Workflow Community Initiative, to assess the state of hybrid integration and identify practical steps toward scalable, impactful deployment.