Quantinuum researchers are unlocking a more efficient and powerful path towards fault tolerance
We've discovered a technique based on “genon braiding” for the construction of logical gates which could be applied to “high rate” error correcting codes
“Computers are useless without error correction”
- Anonymous
If you stumble while walking, you can regain your balance, recover, and keep walking. The ability to function when mistakes happen is essential for daily life, and it permeates everything we do. For example, a windshield can protect a driver even when it’s cracked, and most cars can still drive on a highway if one of the tires is punctured. In fact, most commercially operated planes can still fly with only one engine. All of these things are examples of what engineers call “fault-tolerance”, which just describes a system’s ability to tolerate faults while still functioning.
When building a computer, this is obviously essential. It is a truism that errors will occur (however rarely) in all computers, and a computer that can’t operate effectively and correctly in the presence of faults (or errors) is not very useful. In fact, it will often be wrong - because errors won’t be corrected.
In a new paper from Quantinuum’s world class quantum error correction team, we have made a hugely significant step towards one of the key issues faced in quantum error correction – that of executing fault-tolerant gates with efficient codes.
This work explores the use of “genon braiding” – a cutting-edge concept in the study of topological phases of matter, motivated by the mathematics of category theory, and both related to and inspired by our prior groundbreaking work on non-Abelian anyons.
The native fault tolerant properties of braided toric codes have been theoretically known for some time, and in this newly published work, our team shares how they have discovered a technique based on “genon braiding” for the construction of logical gates which could be applied to “high rate” error correcting codes – meaning codes that require fewer physical qubits per logical qubit, which can have a huge impact on scaling.
Stepping along the path to fault-tolerance
In classical computing, building in fault-tolerance is relatively easy. For starters, the hardware itself is incredibly robust and native error rates are very low. Critically, one can simply copy each bit, so errors are easy to detect and correct.
Quantum computing is, of course, much trickier with challenges that typically don’t exist in classical computing. First off, the hardware itself is incredibly delicate. Getting a quantum computer to work requires us to control the precise quantum states of single atoms. On top of that, there’s a law of physics called the no cloning theorem, which says that you can’t copy qubits. There are also other issues that arise from the properties that make quantum computing so powerful, such as measurement collapse, that must be considered.
Some very distinguished scientists and researchers have thought about quantum error correcting including Steane, Shor, Calderbank, and Kitaev [9601029.pdf (arxiv.org), 9512032.pdf (arxiv.org), arXiv:quant-ph/9707021v1 9 Jul 1997]. They realized that you can entangle groups of physical qubits, store the relevant quantum information in the entangled state (called a “logical qubit”), and, with a lot of very clever tricks, perform computations with error correction.
There are many different ways to entangle groups of physical qubits, but only some of them allow for useful error detection and correction. This special set of entangling protocols is called a “code” (note that this word is used in a different sense than most readers might think of when they hear “code” - this isn’t “Hello World”).
A huge amount of effort today goes into “code discovery” in companies, universities, and research labs, and a great deal of that research is quite bleeding-edge. However, discovering codes is only one piece of the puzzle: once a code is discovered, one must still figure out how to compute with it. With any specific way of entangling physical qubits into a logical qubit you need to figure out how to perform gates, how to infer faults, how to correct them, and so on. It’s not easy!
Quantinuum has one of the world’s leading teams working on error correction and has broken new ground many times in recent years, often with industrial or scientific research partners. Among many firsts, we were the first to demonstrate real-time error correction (meaning a fully-fault tolerant QEC protocol). This included many milestones: repeated real-time error correction, the ability to perform quantum "loops" (repeat-until-success protocols), and real-time decoding to determine the corrections during the computation. We were also the first to perform a logical two-qubit gate on a commercial system. In one of our most recent demonstrations, in partnership with Microsoft, we supported the use of error correcting techniques to achieve the first demonstration of highly reliable logical qubits, confirming our place at the forefront of this research – and indeed confirming that Quantinuum’s H2-1 quantum computer was the first – and at present only – device in the world capable of what Microsoft characterizes as Level 2 Resilient quantum computing.
Introducing new, exotic error correction codes
While codes like the Steane code are well-studied and effective, our team is motivated to investigate new codes with attractive qualities. For example, some codes are “high-rate”, meaning that you get more logical qubits per physical qubit (among other things), which can have a big impact on outlooks for scaling – you might ultimately need 10x fewer physical qubits to perform advanced algorithms like Shor’s.
Implementing high-rate codes is seductive, but as we mentioned earlier we don’t always know how to compute with them. A particular difficulty with high-rate codes is that you end up sharing physical qubits between logical qubits, so addressing individual logical qubits becomes tricky. There are other difficulties that come from sharing physical qubits between logical qubits, such as performing gates between different logical qubits (scientists call this an “inter-block” gate).
One well-studied method for computing with QEC codes is known as “braiding”. The reason it is called braiding is because you move particles, or “braid” them, around each other, which manipulates logical quantum information. In our new paper, we crack open computing with exotic codes by implementing “genon” braiding. With this, we realize a paradigm for constructing logical gates which we believe could be applied to high-rate codes (i.e. inter-block gates).
What exactly “genons” are, and how they are braided, is beautiful and complex mathematics - but the implementation is surprisingly simple. Inter-block logical gates can be realized through simple relabeling and physical operations. “Relabeling”, i.e. renaming qubit 1 to qubit 2, is very easy in Quantinuum’s QCCD architecture, meaning that this approach to gates will be less noisy, faster, and have less overhead. This is all due to our architectures’ native ability to move qubits around in space, which most other architectures can’t do.
Using this framework, our team delivered a number of proof-of-principle experiments on the H1-1 system, demonstrating all single qubit Clifford operations using genon braiding. They then performed two kinds of two-qubit logical gates equivalent to CNOTs, proving that genon braiding works in practice and is comparable to other well-researched codes such as the Steane code.
What does this all mean? This work is a great example of co-design – tailoring codes for our specific and unique hardware capabilities. This is part of a larger effort to find fault-tolerant architectures tailored to Quantinuum's hardware. Quantinuum scientist and pioneer of this work, Simon Burton, put it quite succinctly: “Braiding genons is very powerful. Applying these techniques might prove very useful for realizing high-rate codes, translating to a huge impact on how our computers will scale.”
About Quantinuum
Quantinuum, the world’s largest integrated quantum company, pioneers powerful quantum computers and advanced software solutions. Quantinuum’s technology drives breakthroughs in materials discovery, cybersecurity, and next-gen quantum AI. With over 500 employees, including 370+ scientists and engineers, Quantinuum leads the quantum computing revolution across continents.
Quantinuum is focusing on redefining what’s possible in hybrid quantum–classical computing by integrating Quantinuum’s best-in-class systems with high-performance NVIDIA accelerated computing to create powerful new architectures that can solve the world’s most pressing challenges.
The launch of Helios, Powered by Honeywell, the world’s most accurate quantum computer, marks a major milestone in quantum computing. Helios is now available to all customers through the cloud or on-premise deployment, launched with a go-to-market offering that seamlessly pairs Helios with the NVIDIA Grace Blackwell platform, targeting specific end markets such as drug discovery, finance, materials science, and advanced AI research.
We are also working with NVIDIA to adopt NVIDIA NVQLink, an open system architecture, as a standard for advancing hybrid quantum-classical supercomputing. Using this technology with Quantinuum Guppy and the NVIDIA CUDA-Q platform, Quantinuum has implemented NVIDIA accelerated computing across Helios and future systems to perform real-time decoding for quantum error correction.
In an industry-first demonstration, an NVIDIA GPU-based decoder integrated in the Helios control engine improved the logical fidelity of quantum operations by more than 3% — a notable gain given Helios’ already exceptionally low error rate. These results demonstrate how integration with NVIDIA accelerated computing through NVQLink can directly enhance the accuracy and scalability of quantum computation.
This unique collaboration spans the full Quantinuum technology stack. Quantinuum’s next-generation software development environment allows users to interleave quantum and GPU-accelerated classical computations in a single workflow. Developers can build hybrid applications using tools such as NVIDIA CUDA-Q, NVIDIA CUDA-QX, and Quantinuum’s Guppy, to make advanced quantum programming accessible to a broad community of innovators.
The collaboration also reaches into applied research through the NVIDIA Accelerated Quantum Computing Research Center (NVAQC), where an NVIDIA GB200 NVL72 supercomputer can be paired with Quantinuum’s Helios to further drive hybrid quantum-GPU research, including the development of breakthrough quantum-enhanced AI applications.
A recent achievement illustrates this potential: The ADAPT-GQE framework, a transformer-based Generative Quantum AI (GenQAI) approach, uses a Generative AI model to efficiently synthesize circuits to prepare the ground state of a chemical system on a quantum computer. Developed by Quantinuum, NVIDIA, and a pharmaceutical industry leader—and leveraging NVIDIA CUDA-Q with GPU-accelerated methods—ADAPT-GQE achieved a 234x speed-up in generating training data for complex molecules. The team used the framework to explore imipramine, a molecule crucial to pharmaceutical development. The transformer was trained on imipramine conformers to synthesize ground state circuits at orders of magnitude faster than ADAPT-VQE, and the circuit produced by the transformer was run on Helios to prepare the ground state using InQuanto, Quantinuum's computational chemistry platform.
From collaborating on hardware and software integrations to GenQAI applications, the collaboration between Quantinuum and NVIDIA is building the bridge between classical and quantum computing and creating a future where AI becomes more expansive through quantum computing, and quantum computing becomes more powerful through AI.
By Dr. Noah Berthusen
The earliest works on quantum error correction showed that by combining many noisy physical qubits into a complex entangled state called a "logical qubit," this state could survive for arbitrarily long times. QEC researchers devote much effort to hunt for codes that function well as "quantum memories," as they are called. Many promising code families have been found, but this is only half of the story.
Being able to keep a qubit around for a long time is one thing, but to realize the theoretical advantages of quantum computing we need to run quantum circuits. And to make sure noise doesn't ruin our computation, these circuits need to be run on the logical qubits of our code. This is often much more challenging than performing gates on the physical qubits of our device, as these "logical gates" often require many physical operations in their implementation. What's more, it often is not immediately obvious which logical gates a code has, and so converting a physical circuit into a logical circuit can be rather difficult.
Some codes, like the famous surface code, are good quantum memories and also have easy logical gates. The drawback is that the ratio of physical qubits to logical qubits (the "encoding rate") is low, and so many physical qubits are required to implement large logical algorithms. High-rate codes that are good quantum memories have also been found, but computing on them is much more difficult. The holy grail of QEC, so to speak, would be a high-rate code that is a good quantum memory and also has easy logical gates. Here, we make progress on that front by developing a new code with those properties.
Building on prior error correcting codes
A recent work from Quantinuum QEC researchers introduced genon codes. The underlying construction method for these codes, called the "symplectic double cover," also provided a way to obtain logical gates that are well suited for Quantinuum's QCCD architecture. Namely, these "SWAP-transversal" gates are performed by applying single qubit operations and relabeling the physical qubits of the device. Thanks to the all-to-all connectivity facilitated through qubit movement on the QCCD architecture, this relabeling can be done in software essentially for free. Combined with extremely high fidelity (~1.2 x10-5) single-qubit operations, the resulting logical gates are similarly high fidelity.
Given the promise of these codes, we take them a step further in our new paper. We combine the symplectic double codes with the [[4,2,2]] Iceberg code using a procedure called "code concatenation". A concatenated code is a bit like nesting dolls, with an outer code containing codes within it---with these too potentially containing codes. More technically, in a concatenated code the logical qubits of one code act as the physical qubits of another code.
The new codes, which we call "concatenated symplectic double codes", were designed in such a way that they have many of these easily-implementable SWAP-transversal gates. Central to its construction, we show how the concatenation method allows us to "upgrade" logical gates in terms of their ease of implementation; this procedure may provide insights for constructing other codes with convenient logical gates. Notably, the SWAP-transversal gate set on this code is so powerful that only two additional operations (logical T and S) are necessary for universal computation. Furthermore, these codes have many logical qubits, and we also present numerical evidence to suggest that they are good quantum memories.
Concatenated symplectic double codes have one of the easiest logical computation schemes, and we didn’t have to sacrifice rate to achieve it. Looking forward in our roadmap, we are targeting hundreds of logical qubits at ~ 1x 10-8 logical error rate by 2029. These codes put us in a prime position to leverage the best characteristics of our hardware and create a device that can achieve real commercial advantage.
Every year, the International Conference for High Performance Computing, Networking, Storage, and Analysis (SC) brings together the global supercomputing community to explore the technologies driving the future of computing.
Join Quantinuum at this year’s conference, taking place November 16th – 21st in St. Louis, Missouri, where we will showcase how our quantum hardware, software, and partnerships are helping define the next era of high-performance and quantum computing.
Visit Quantinuum in the Expo Hall
The Quantinuum team will be on-site at booth #4432 to showcase how we’re building the bridge between HPC and quantum.
- Live demo unit of our quantum hardware
- Our new Helios replica, providing an up-close look at the design behind our next-generation system
- The Helios chip, highlighting the innovation driving the world’s most advanced trapped-ion quantum computers
On Tuesday and Wednesday, our quantum computing experts will host daily tutorials at our booth on Helios, our next-generation hardware platform, Nexus, our all-in-one quantum computing platform, and Hybrid Workflows, featuring the integration of NVIDIA CUDA-Q with Quantinuum Systems.
Speaking Sessions at SC25
Join our team as they share insights on the opportunities and challenges of quantum integration within the HPC ecosystem:
Panel Session: The Quantum Era of HPC: Roadmaps, Challenges and Opportunities in Navigating the Integration Frontier
November 19th | 10:30 – 12:00pm CST
During this panel session, Kentaro Yamamoto from Quantinuum, will join experts from Lawrence Berkeley National Laboratory, IBM, QuEra, RIKEN, and Pawsey Supercomputing Research Centre to explore how quantum and classical systems are being brought together to accelerate scientific discovery and industrial innovation.
BoF Session: Bridging the Gap: Making Quantum-Classical Hybridization Work in HPC
November 19th | 5:15 – 6:45pm CST
Quantum-classical hybrid computing is moving from theory to reality, yet no clear roadmap exists for how best to integrate quantum processing units (QPUs) into established HPC environments. In this Birds of a Feather discussion, co-led by Quantinuum’s Grahame Vittorini and representatives from BCS, DOE, EPCC, Inria, ORNL NVIDIA, and RIKEN we hope to bring together a global community of HPC practitioners, system architects, quantum computing specialists and workflow researchers, including participants in the Workflow Community Initiative, to assess the state of hybrid integration and identify practical steps toward scalable, impactful deployment.